One of the significant research areas of the last decade has been "transactional memory", which in concept involves the use of DBMS transaction paradigms (the "ACID" mnemonic: Atomic Consistent Isolated and Durable actions) in the microprocessor's memory model.
Slowly, that work has been emerging from the lab and into viability.
There's a lot of interest in Intel's recently announced TSX extensions for their new Haswell processor architecture, described in Transactional Synchronization in Haswell.
And here are two additional perspectives:
- David Kanter covers the topic in detail over at Real World Technologies: Analysis of Haswell's Transactional Memory
- And Jeremy Manson has a shorter but very informative essay on his blog: Transactional Hardware on x86
This work is going to take a long time to evolve: it's complicated and not easy to use.
But as Moore's Law continues to grind to a halt, and multi-code programming continues to expand, this sort of technique is the way of the future.
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